The present invention relates to a fully balanced analog circuit (or a fully differential analog circuit), and more particularly to a high-speed, fully balanced analog circuit which is particularly capable of not using common mode feedback so that in-phase components of an input signal can be eliminated.
In recent years, demands for digital-analog integrated systems have increased. In this kind of a system, digital circuits and analog circuits are mounted on a single semiconductor chip, and the analog circuits must be designed in consideration of noise, i.e., digital noise from the digital circuits. A typical example of a countermeasure for digital noise is a fully balanced circuit which suppresses noise having in-phase components from anti-phase input signals, a power voltage, and the like.
As a fully balanced analog circuit using an operational amplifier, a circuit as shown in FIG. 1 has been known. This circuit is an inverting amplifier circuit which consists of a fully balanced operational amplifier 16 and four resistors 10, 11, 12, and 13. The resistor 10 is connected between a first signal input terminal Vi1 and an inverting input terminal of the operational amplifier 16. Further, the resistor 12 is connected between the inverting input terminal and the first signal output terminal Vo1, and the resistor 13 is connected between the non-inverting input terminal and the second signal output terminal Vo2. The fully balanced operational amplifier 16 described above includes two feedback resistors 14 and 15 and a common-mode sense amplifier 17. The feedback resistors 14 and 15 are connected in series between the signal output terminals Vo1 and Vo2, and the sense amplifier 17 amplifies and feeds back the difference between the potential of the node of these resistors 14 and 15 and a reference potential V.sub.REF of a reference potential supply source VR. The amplifier 17 is connected in such a way that the output components Vo1 and Vo2 do not depend on in-phase input components according to so-called common mode feedback (CMF).
In the circuit shown in FIG. 1, the feedback circuit formed with the resistors 14 and 15 is regarded as a load to the operational amplifier 16. These resistors cannot be set to have very low resistances due to limitations from the driving power (or output current) of the amplifier 16 but the resistances of these resistors must be high to some extent. However, due to the structure of a semiconductor integrated circuit device, a parasitic capacitance is formed between the resistors and a substrate, the parasitic capacitance increases as the resistances increases. Therefore, the parasitic capacitance cannot be neglected with respect to a high-frequency range, so that the frequency characteristic of the circuit is influenced. In addition, there is a possibility that an oscillation is generated due to a phase delay of a signal in the feedback path, in the worst case.
Further, since an operational amplifier of a fully balanced type is more complicated than an ordinary operational amplifier, the design of this amplifier cannot be said to be simple.